Energy Efficient Quaternary Capacitive DAC Switching Scheme for SAR -ADC - Chavhan, Sarvesh S.; Bogawar, K. M. (Journal of Advance Research in Electrical & Electronics Engineering (ISSN 2208-2395), 2015)
This paper presents energy efficient 4-bit successive approximation register analog to digital converter (SAR-ADC) for neural recording front end interface of neural prosthetic system(Brain machine interface). The energy efficient quaternary capacitive switching scheme (QCS) in the implementation of capacitive digital to analog converter (C-DAC) is employed which makes the energy consumption in the C-DAC independent of the output digital code. The proposed quaternary capacitive technique in C-DAC achieves a 50% reduction in the average energy consumption. The design is implemented in 0.25um standard complementary metal-oxide semiconductor technology (CMOS).